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Forums » AxiomAir Discussion » Android Devices » Reflections from Change in Line Width of PCB


#431873  04/17/19 01:53 AM Reflections from Change in Line Width of PCB  
frequent flier Registered: 01/23/18 Posts: 14 
When performing PCB wiring, it often happens that when the alignment passes through a certain area, due to the limited wiring space in the area, finer lines have to be used. After passing through this area, the lines are restored to their original width. Changes in the width of the alignment cause impedance changes, so reflections occur and affect the signal. So in what circumstances can this impact be ignored, and in what circumstances must we consider its impact? Three factors are related to this effect: the size of the impedance change, the signal rise time, and the delay of the signal on the narrow line. The size of the impedance change is discussed first. Many circuits are designed to reflect noise less than 5 % of the voltage swing(this is related to the noise budget on the signal). According to the coefficient of reflection formula: Hey =(Z2Z1) /(Z2 + Z1) = <UNK> Z /(<UNK> Z +2 Z1) ≤ 5 %, the approximate rate of change of impedance can be calculated as: <UNK> Z/Z1 ≤ 10 % As you may know, the typical indicator of impedance on a circuit board is + / 10 %, and that's why. If the impedance change occurs only once, for example, after the line width changes from 8mil to 6mil, the 6mil width is maintained at all times. To meet the noise budget requirement that the signal reflection noise at the mutation does not exceed 5 % of the voltage swing, the impedance change must be less than 10 %. This is sometimes difficult to do. Take the microstrip line on the FR4 plate as an example. Let's calculate. If the line width is 8 mil, the thickness between the line and the reference plane is 4 mil, and the characteristic impedance is 46.5 ohms. After the line width changes to 6 mil, the characteristic impedance becomes 54.2 ohms, and the impedance change rate reaches 20 %. The range of reflection signals must be excessive. As for the effect on the signal, it is also related to the time delay of the signal rising time and the signal from the drive end to the reflection point. But at least it's a potential problem. Fortunately, the problem can be solved by impedance matching terminal connection. http://www.pcbindex.com/ If the impedance change twice, for example, after the line width changes from 8mil to 6mil, it will change back to 8mil after pulling out 2cm. Then the reflection will occur at the two ends of the 2cm long 6mil wide line, once the impedance becomes larger. Positive reflection occurs, and then the impedance becomes smaller and negative reflection occurs. If the interval between the two reflections is short enough, the two reflections may cancel each other out, thereby reducing the impact. Assuming the transmission signal is 1V, 0.2 V is reflected in the first positive reflection, 1.2 V continues to transmit forward, and 0.2 * 1.2 = 0.24 V is reflected back in the second reflection. Assuming that the 6mil line is extremely short in length and that the two reflections occur almost simultaneously, the total reflection voltage is only 0.04 V, which is less than 5 % of the noise budget requirement. Therefore, whether this reflection affects the signal, how much effect it has, is related to the delay at the impedance change and the signal rise time. Studies and experiments show that as long as the delay at the impedance change is less than 20 % of the signal rise time, the reflection signal will not cause problems. If the signal rises at 1 NS, the delay at the impedance change is less than 0.2 NS corresponding to 1.2 inches, and the reflection does not cause problems. That is to say, for this case, there is no problem with the length of the 6mil wide alignment as long as it is less than 3cm. When the width of the PCB alignment changes, it is necessary to carefully analyze the actual situation and whether it affects it. There are three parameters to pay attention to: how large the impedance change, how long the signal rises, and how long the neck part of the line width changes. Make a rough estimate based on the above method and set aside a certain amount of margin. If possible, minimize the length of the neck. It should be pointed out that in actual PCB processing, the parameters can not be as accurate as the theory. The theory can provide guidance for our design, but it can not copy the copy and can not be dogmatic. After all, this is a practical science. The estimated value should be revised according to the actual situation and applied to the design. 
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